module Mux21to7_2bit(X,y06,y05,y04,y03,y02,y01,y00,z06,z05,z04,z03,z02,z01,z00,Op,S1,S2);

input [6:0] X;
input y00,y01,y02,y03,y04,y05,y06;
input z00,z01,z02,z03,z04,z05,z06;
input S1,S2;
output [6:0] Op;

Mux3to1_2bit mux3120(X[0],y00,z00,Op[0],S1,S2);
Mux3to1_2bit mux3121(X[1],y01,z01,Op[1],S1,S2);
Mux3to1_2bit mux3122(X[2],y02,z02,Op[2],S1,S2);
Mux3to1_2bit mux3123(X[3],y03,z03,Op[3],S1,S2);
Mux3to1_2bit mux3124(X[4],y04,z04,Op[4],S1,S2);
Mux3to1_2bit mux3125(X[5],y05,z05,Op[5],S1,S2);
Mux3to1_2bit mux3126(X[6],y06,z06,Op[6],S1,S2);

endmodule
